1. Field of the Invention
The present invention relates to a complex power management device and a communication device, and particularly to a complex power management device having a structure in which a plurality of non-isolated step-down (or step-up) DC/DC converters are integrated within one electronic-component built-in substrate, and a communication device having such a complex power management device.
2. Description of Related Art
In communication devices such as smartphones that have become rapidly popular in recent years, a power-supply voltage that is supplied from outside is stepped down, or stepped up, before being supplied to an internal processor. Therefore, non-isolated DC/DC converters are used. The non-isolated DC/DC converters use switching of transistors to convert the voltage, and are therefore suitable for making the devices smaller in size because the converters do not use transformers. In recent years, an electronic-component built-in substrate that contains such non-isolated DC/DC converters has been increasingly used. What is disclosed in Japanese Patent No. 4953034 is an example of an electronic-component built-in substrate that contains a step-down DC/DC converter.
Some of the latest communication devices such as smartphones contain a plurality of components, such as baseband processors and application processors, that require different levels of power-supply voltage. In this case, what is required is a mechanism for generating a plurality of levels of power-supply voltage from a single power-supply voltage. As a concrete example, in recent years, a study of a complex power management device that has a structure in which a plurality of non-isolated DC/DC converters are integrated in one electronic-component built-in substrate has been under way.
However, if a plurality of non-isolated DC/DC converters are integrated in one electronic-component built-in substrate, an error in a step-down or step-up operation becomes larger compared with the case where only one non-isolated DC/DC converter is incorporated. Therefore, an improvement needs to be made. Hereinafter, this point will be described in detail.
FIG. 6A is a diagram showing a non-isolated step-down DC/DC converter 100 according to background art of the present invention; FIG. 6B is a diagram showing a non-isolated step-up DC/DC converter 110 according to background art of the present invention. FIG. 6A also shows a DC power supply 120, and a load 121 to which a stepped-down power-supply voltage is supplied. FIG. 6B also shows a DC power supply 120, and a load 122 to which a stepped-up power-supply voltage is supplied. First, the configurations of those components will be described. Then, problems with the case where a plurality of non-isolated DC/DC converters are integrated in one electronic-component built-in substrate will be described.
As shown in FIG. 6A, the step-down DC/DC converter 100 includes a switch element 101, which is a P-channel MOS transistor; a switch element 102, which is a N-channel MOS transistor; a choke coil 103; an error amplifier 104; a reference voltage generation circuit 105; a variable resistor 106; a resistor 107; a ramp wave generation circuit 108; and a comparator 109. To an input node n100 of the step-down DC/DC converter 100, a DC power supply 120 is connected. To an output node n101, a load 121 is connected.
The switch element 101 and the choke coil 103 are connected in series in this order between the input node n100 and the output node n101. The switch element 102 is connected between a node n102, which is a connection point of the switch element 101 and choke coil 103, and a ground terminal. The resistor 107 and the variable resistor 106 are connected in series in this order between the output node n101 and a node n103, which is a ground-side end of the switch element 102.
Gate electrodes of the switch elements 101 and 102 are connected to an output terminal of the comparator 109. A non-inverting input terminal of the comparator 109 is connected to an output terminal of the ramp wave generation circuit 108. An inverting input terminal of the comparator 109 is connected to an output terminal of the error amplifier 104. A non-inverting input terminal of the error amplifier 104 is connected to the reference voltage generation circuit 105. An inverting input terminal of the error amplifier 104 is connected to a node n104, which is a connection point of the resistor 107 and the variable resistor 106.
In the step-down DC/DC converter 100, under the control of the error amplifier 104, the state of the switch elements 101 and 102 is switched. More specifically, between a first state in which the switch elements 101 and 102 are ON and OFF, respectively, and a second state in which the switch elements 101 and 102 are OFF and ON, respectively, the state of the switch elements 101 and 102 is switched. In the first state, the power-supply voltage is supplied along a route R101 from the DC power supply 120 to the load 121, and energy is accumulated in the choke coil 103. In the second state, a voltage is generated from the energy released from the choke coil 103, and the voltage is supplied along a route R102 to the load 121.
The error amplifier 104 outputs a value obtained by integrating the difference between the voltage of the node n104 and an output voltage of the reference voltage generation circuit 105. If the integration value is larger than the output voltage of the ramp wave generation circuit 108, the comparator 109 outputs a low-level voltage, and the switch elements 101 and 102 shift into the above-described first state. As a result, the voltage of the output node n101 rises. On the other hand, if the output of the error amplifier 104 is smaller than the output voltage of the ramp wave generation circuit 108, the comparator 109 outputs a high-level voltage, and the switch elements 101 and 102 shift into the above-described second state. As a result, the voltage of the output node n101 drops. In this manner, the voltage of the output node n101 remains equal to a constant value.
As shown in FIG. 6B, the step-up DC/DC converter 110 includes a switch element 111, which is a N-channel MOS transistor; a switch element 112, which is a P-channel MOS transistor; a choke coil 113; an error amplifier 114; a reference voltage generation circuit 115; a variable resistor 116; a resistor 117; a ramp wave generation circuit 118; and a comparator 119. To an input node n110 of the step-up DC/DC converter 110, a DC power supply 120 is connected. To an output node n111, a load 122 is connected.
The choke coil 113 and the switch element 112 are connected in series in this order between the input node n110 and the output node n111. The switch element 111 is connected between a node n112, which is a connection point of the choke coil 113 and the switch element 112, and a ground terminal. The resistor 117 and the variable resistor 116 are connected in series in this order between the output node n111 and a node n113, which is a ground-side end of the switch element 111.
Gate electrodes of the switch elements 111 and 112 are connected to an output terminal of the comparator 119. A non-inverting input terminal of the comparator 119 is connected to an output terminal of the ramp wave generation circuit 118. An inverting input terminal of the comparator 119 is connected to an output terminal of the error amplifier 114. A non-inverting input terminal of the error amplifier 114 is connected to the reference voltage generation circuit 115. An inverting input terminal of the error amplifier 114 is connected to a node n114, which is a connection point of the resistor 117 and the variable resistor 116.
In the step-up DC/DC converter 110, under the control of the error amplifier 114, the state of the switch elements 111 and 112 is switched. More specifically, between a third state in which the switch elements 111 and 112 are ON and OFF, respectively, and a fourth state in which the switch elements 111 and 112 are OFF and ON, respectively, the state of the switch elements 111 and 112 is switched. In the third state, the power-supply voltage is supplied along a route R103 from the DC power supply 120 to the choke coil 113, and energy is accumulated in the choke coil 113. In the fourth state, the power-supply voltage is supplied along a route R104 from the DC power supply 120 to the load 122. However, a voltage generated from the energy released from the choke coil 113 is added. Therefore, the voltage that is applied to the load 122 is greater than the power-supply voltage output from the DC power supply 120.
The error amplifier 114 outputs a value obtained by integrating the difference between the voltage of the node n114 and an output voltage of the reference voltage generation circuit 115. If the integration value is larger than the output voltage of the ramp wave generation circuit 118, the comparator 119 outputs a high-level voltage, and the switch elements 111 and 112 shift into the above-described third state. As a result, energy is accumulated in the choke coil 113, and the voltage of the output node n111 drops. On the other hand, if the output of the error amplifier 114 is smaller than the output voltage of the ramp wave generation circuit 118, the comparator 119 outputs a low-level voltage, and the switch elements 111 and 112 shift into the above-described fourth state. As a result, the voltage of the output node n111 rises. In this manner, the voltage of the output node n111 remains equal to a constant value.
The following describes problems with the case where a plurality of non-isolated DC/DC converters are integrated in one electronic-component built-in substrate.
First, the following description will focus on the step-down DC/DC converter 100. As can be seen from the above description, the error amplifier 104 controls the switching of the switch elements 101 and 102 based on the voltage of the node n104. The voltage of the node n104 varies according not only to the voltage of the node n101 but to the voltage of the node n103. Therefore, in order for the error amplifier 104 to properly operate, the voltage of the node n103 needs to be kept at a constant level.
As shown in FIG. 6A, the node n103 is connected to the ground terminal. Accordingly, the voltage of the node n103 is usually equal to a ground potential that is supplied from outside. In fact, if current flows through the route R101 (and current does not flow through the node n103), the voltage of the node n103 is substantially equal to the ground potential. However, if current flows through the route R102, the voltage of the node n103 becomes smaller than the ground potential. The reason is that the voltage drops due to the existence of wiring resistance between the node n103 and the ground terminal.
If only one non-isolated DC/DC converter is incorporated into one electronic-component built-in substrate, the internal wiring and internal via conductors of the electronic-component built-in substrate can be designed in such a way as to make the wiring resistance between the node n103 and the ground terminal as small as possible. In this manner, the above-described drop in the voltage of the node n103 can be lowered to an almost non-problematic level. However, if a plurality of non-isolated DC/DC converters are integrated in one electronic-component built-in substrate, the design flexibility of the internal wiring and internal via conductors of the electronic-component built-in substrate is significantly limited. Therefore, it is difficult to lower the drop in the voltage of the node n103 by improving the design. As a result, an error in the step-down operation becomes larger.
The same is true for the step-up DC/DC converter 110. In the step-up DC/DC converter 110, in order for the error amplifier 114 to properly operate, the voltage of the node n113 needs to be kept at a constant level. However, if a plurality of non-isolated DC/DC converters are integrated in one electronic-component built-in substrate, the design flexibility of the internal wiring and internal via conductors of the electronic-component built-in substrate is significantly limited. Therefore, it is difficult to lower an increase in the voltage of the node n113 (or an increase caused by the current flowing through the route R103) by improving the design. As a result, an error in the step-up operation can become larger.